1. Field of the Invention
This invention relates to a digital/analog converting circuit, particularly to so-called R-2R type digital/analog converting circuit, more specifically, to a digital/analog converting circuit capable of switching an output/non-output of an analog signal obtained by converting a digital signal as well as capable of solving a non-linear range of a digital/analog converting characteristic generated when a non-output function of an analog signal is provided.
2. Description of Related Art
FIG. 1 is a block diagram showing a configuration of a one-chip microcomputer in which a conventional R-2R type digital/analog converting circuit 8 is built, in, and which is capable of switching the output/non-output of an analog signal to the outside.
In the one-chip microcomputer 1, a signal input/output terminal 2 which is capable of inputting and outputting of a signal to the outside is provided. In the one-chip microcomputer 1, a CPU 3, ROM 4, RAM 5, data register 6, D/A (digital/analog) converter select register 7, digital/analog converting circuit 8, switching circuit 9, digital signal input/output port 10 and bus 11 are built in.
The CPU 3, ROM 4, RAM 5, data register 6, D/A converter select register 7 and digital signal input/output port 10 are connected to each other by the bus 11. Data held in the D/A converter select register 7 is given to the switching circuit 9 and the digital signal input/output port 10. Digital data held in the data register 6 is inputted to the digital/analog converting circuit 8, and the analog signal after the digital/analog conversion is outputted to the outside from the signal input/output terminal 2 through the switching circuit 9. The digital signal inputted from the outside to the signal input/output terminal 2 is to be inputted to the digital signal input/output, port 10.
In the one-chip microcomputer 1, when the switching circuit 9 is turned to ON by the data held in the D/A converter select register 7, an analog signal converted from a digital signal by the digital/analog converting circuit 8 is outputted to the signal input/output terminal 2. On the other hand, in the case where the switching circuit is turned to OFF, when a digital signal is input ted to the signal input/output terminal 2 from the outside, the digital signal is input ted to the digital signal input/output port 10. The one-chip microcomputer 1 can also output, a digital signal From the digital signal input output port 10 to the signal input/output terminal 2.
FIG. 2 is a circuit diagram showing a configuration of the digital/analog converting circuit 8 and the switching circuit 9.
Reference character DT designates a digital signal, which is composed of a plurality of bits (n bits) of the MSB to the LSB.
Each of reference characters B.sub.1, B.sub.2 . . . B.sub.n designates a non-inverting buffer having an output resistance value of r. To one end of each of these non-inverting buffers B.sub.1, B.sub.2 . . . B.sub.n, the signal of each bit of the aforementioned digital signal is inputted.
Each of characters D.sub.1, D.sub.2 . . . D.sub.n designates a resistance having a resistance value 2R-r. To the one end of each of these resistances D.sub.1, D.sub.2 . . . D.sub.n, the output side (the other end) of the aforementioned each of the non-inverting buffers B.sub.1, B.sub.2 . . . B.sub.n is connected.
The other end of the resistance D.sub.1 is grounded through a serial circuit of resistances E.sub.1, E.sub.2 . . . each having a resistance value R and resistance E.sub.n having a resistance value 2R. The other end of the resistance D.sub.2 is connected to a connecting node between the resistances E.sub.1 and E.sub.2, and the other end of the resistance D.sub.n is connected to the one end of the non-grounded side of the resistance E.sub.n.
The other end of the resistance D1 is also connected to one end of a parallel circuit of a P channel MOS transistor Q.sub.P and an N channel MOS transistor Q.sub.N. This parallel circuit configures the switching circuit 9 shown in FIG. 1. From the other end of the parallel circuit, of the MOS transistor Q.sub.P and the MOS transistor Q.sub.N, an analog signal AN is outputted. An ON/OFF control signal S.sub.C which ON/OFF controls the MOS transistors Q.sub.P and Q.sub.N is inputted to a gate of the MOS transistor Q.sub.N as well as to a gate of the MOS transistor Q.sub.P through an inverter IV.
FIG. 8 is a circuit diagram showing a common configuration of each of the non-inverting buffers B.sub.1, B.sub.2 . . . B.sub.n.
The output side of the inverter IV.sub.B, to which each bit of the digital signal DT is inputted, is connected to a gate of the P-channel MOS transistor Q.sub.PB and to a gate of the N-channel MOS transistor Q.sub.NB which are connected seriously. To one end of the serial circuit of the P channel MOS transistor Q.sub.PB and the N channel MOS transistor Q.sub.NB, a power potential V.sub.D is given, and to the other end, a ground potential V.sub.S is given. From the connecting node of the MOS transistors Q.sub.PB and Q.sub.NB, a digital signal is outputted.
In the following, explanation will be given on the operation of the conventional digital/analog converting circuit 8 and the switching circuit 9.
When a signal of each bit of the digital signal DT is inputted to each of the non-inverting buffers B.sub.1, B.sub.2 . . . B.sub.n, the output of the inverter IV.sub.B to which a signal of "H" level (or "L" level) is inputted becomes "L" level (or "H" level), and the MOS transistor Q.sub.PB (or Q.sub.N B) is turned to ON so that a signal of the power potential V.sub.D (or ground potential V.sub.S), that is, "H" level (or "L" level) is outputted. And the signal outputted from each of the non-inverting buffers B.sub.1, B.sub.2 . . . B.sub.n corresponding to a signal of each bit of the digital signal DT is given to the resistance group comprising the resistances D.sub.1, D.sub.2 . . . D.sub.n and the resistances E.sub.1, E.sub.2 . . . E.sub.n, so that a digital signal is converted into an analog signal. From the digital/analog converting circuit 8 of n bits, an analog signal of 2.sup.n steps of voltage level of 0, V.sub.D /2.sup.n . . . {(2.sup.n -1)V.sub.D }/2.sup.n is obtained.
And when the ON/OFF control signal S.sub.C becomes in "H" level, the digital/analog converting circuit 8 performs digital/analog conversion. On the contrary, when the ON/OFF control signal S.sub.C becomes in "L" level and all of the inputs of the non-inverting buffers B.sub.1, B.sub.2 . . . B.sub.n are in "L" level, the digital/analog conversion is not performed. When the ON/OFF control signal S.sub.C is in "H" level, an analog signal AN obtained by converting a digital signal is outputted from the switching circuit 9 and when the ON/OFF control signal S.sub.C is in "L" level, the analog signal AN is not to be outputted from the switching circuit 9.
By the way, in the case where the analog signal AN, which is obtained by converting a digital signal into an analog signal and outputted from the switching circuit 9, is given to a load resistance L as shown in FIG. 2, when the resistance value of the load resistance L is extremely high, electric current seldom flows through the load resistance L. Therefore, since electric current seldom flows through the switching circuit 9, electric current of the analog signal seldom flows through the load resistance L. Therefore, as shown in FIG. 4 by a broken line X, the voltage level of the analog signal after converting the digital signal changes linearly.
But when the resistance value of the load resistance L is low, the electric potential is dropped by the on-resistance of the MOS transistors Q.sub.P and Q.sub.N of the switching circuit 9. In a predetermined range of the input potential of the on-resistance, there is an area where the on-resistance becomes extremely high. Therefore, when the electric current of the load resistance L is large, as shown by the solid line Y in FIG. 4, in a predetermined range H of a digital signal, the voltage level of an analog signal does not change linearly with respect to the digital signal. So, there is a problem that conversion accuracy of a digital signal to an analog signal is reduced when the resistance value of the load resistance is small.
In order to improve the precision of digital to analog conversion for such a change of a digital signal, the voltage level of an analog signal had better change linearly. Therefore, it is necessary to widen the channel width W of the transistors Q.sub.P and Q.sub.N of the switching circuit 9 so as to reduce the on resistance. But in such a case, various problems generated at the time of integrating the digital/analog converting circuit in a microcomputer, especially in a one-chip microcomputer.